1. Technical Field
The present invention relates to a test apparatus and a test method.
2. Related Art
An interface is known that is referred to as “source-synchronous,” in which a clock signal is output in synchronization with a data signal. Patent Document 1 describes a test apparatus that tests a device under test adopting such an interface. The test apparatus in Patent Document 1 samples the data value of a data signal using a clock signal output from the device under test, and compares the sampled data value to an expected value.    Patent Document 1: U.S. Pat. No. 7,644,324
A source-synchronous interface transmits a data signal and a clock signal in parallel via different transmission paths. Accordingly, when the delay amount of the transmission path transmitting the data signal is different from the delay amount of the transmission path transmitting the clock signal, the test apparatus cannot perform accurate testing.